1. Field of the Invention
This invention relates to electronic circuits used to control the speed of a direct current motor and more particularly to a method and circuit for using a frequency lock loop to control the speed of a motor, and still more particularly to a method and circuit for using a coarse counter and a fine counter in a frequency control loop.
2. Description of the Relevant Art
The problem addressed by this invention is encountered in the disk drive industry where the accuracy of rotational speed is increasingly important. The trend in the industry has been to increase the storage capacity and the accuracy of the disk drive while reducing the weight and power consumption. Consequently, drive manufacturers have increased the density of data on a disk in a disk drive while decreasing the inertial and rotational mass of the disk drive; therefore, the need for controlling the speed of a drive to a high degree of accuracy while minimizing jitter is becoming of paramount importance, especially in high density small package disk drives such as those used in the portable computer market.
FIG. 1 shows a block diagram of a speed control circuit as is known in the prior art. The speed control circuit consists of a sequencer 10, a back EMF detection circuit 12, a serial port 14, a spindle block 16, a frequency lock loop circuit 18, an oscillator 20, and stator coils A, B, and C. It is well known in the art a disk drive is manufactured by combining the block diagram of the speed control circuit in FIG. 1 with read/write heads, head motors, magnetic media, a rotor, and a disk drive housing. The rotor, which is not shown in the diagram, rotates responsive to coils A, B, and C being energized in a standard sequence, such as in bipolar operation. In bipolar operation, sequencer 10 controls spindle block 10 such that current is driven through two coils while a third coil is left floating. The sequencer 10 controls the spindle block 16 such that back electromotive force (BEMF) of the floating coil is buffered so that the BEMF detection circuit 12 can generate a zero crossing signal from the buffered BEMF signal. The zero crossing signal is used by the sequencer to determine the position of the rotor relative to the stator coils and is used by the frequency lock loop circuit 18 to control the rotational velocity of the rotor. The method and apparatus for operating a polyphase DC motor is more fully explained in U.S. Pat. No. 5,221,881, which is fully incorporated into this specification by reference.
In general, the rotational velocity is controlled the frequency lock loop by comparing the actual period for rotation to the period of a reference signal and, from this comparison, determining whether the rotor is going too fast or too slow. Oscillator circuit 20 and a counter in the frequency lock loop 18 provide the reference period for the comparison. Serial port 14 is used to communicate the desired speed to the frequency lock loop, as is known in the art. If the rotor is going too fast, the frequency lock loop circuit 18 provides a signal to the spindle block which lowers the current to the coils to slow them down. Conversely, if the rotor is going too slow, the frequency lock loop circuit provides a signal to the spindle block 16 which increases the current to the coils. The method and apparatus for controlling the speed in a direct current motor is more fully explained in U.S. Pat. No. 5,223,772, which is fully incorporated into this specification by reference.
FIG. 2 shows the frequency lock loop circuit 18 in detail. In FIG. 2, the zero crossing signal enters the programmable divider 22 and is divided by the number of poles in the motor, which is programmable through the serial port connection. By dividing the zero crossing signal by the number of poles in the motor, a tach signal is developed that changes state every mechanical revolution. This is done to develop a low jitter tach signal.
The 14 bit programmable counter 24 is used to generate the reference period which is compared to the tach signal. More specifically, the serial port programs the 14 bit programmable counter with a count which, when multiplied by the frequency of the oscillator, represents the reference period for one revolution. When the tach signal is received by the 14 bit programmable counter 24, it begins to count down from the programmed count and sets the reference signal on line 25 high. When the count has reached zero, the reference signal 25 goes low.
The tach signal on line 23 and the reference signal on line 25 are used to control current sources 26 and 28, respectively. Current source 26, when on, charges the compensation network 33, which consists of capacitor 30, capacitor 32, and resistor 34. Conversely, current source 28 discharges the compensation network 33. The current source 26 and 28 in combination with the control signals are commonly referred to as a charge pump circuit since the current source charge or discharge the compensation network, as described above. The resulting voltage on the compensation network is buffered by amplifier 36 and then received by the spindle block 16 of FIG. 1. The spindle block 16 uses the buffered signal to control the current used to drive the stator coils, which ultimately controls the speed of the motor.
FIG. 3 shows the relationship of the tach signal to the reference signal. The top wave form shows the tach signal for a motor that is running slow. For a motor running slow, the period of the tach signal would be longer than the reference signal by an amount equal to the time indicated by the arrows on the tach (slow) wave form in FIG. 3. In this case, the charge pump 27 and more specifically the current source 26 would charge network 33 to a higher voltage, which could be sensed by amplifier 36 to speed the motor. Conversely, the second wave form tach (fast) shows a tach signal where the motor is running faster than the reference signal by the amount indicated by the arrows labeled fast. In this case, the charge pump 27 and more specifically current source 28 would discharge the compensation network 33. In both cases, the difference between the tach signal and the reference signal represents the error in the speed control circuit.
A problem with the prior art circuit is that the frequency lock circuit can only measure every other cycle. Consequently, the bandwidth of the FLL is limited. A second problem is that the frequency lock loop circuit does not perform well on hard disk drives in portable computers since a portable system exposed to physical shocks. Small movements of the system can create temporary fluctuations in the rotational velocity which can cause the FLL to respond to the change by changing the power to the motor. Since the fluctuations in the rotational velocity are temporary, the resulting corrections by the FLL are typically over reactions to the physical shock. The problem is that the speed control loop tries to compensate for these fluctuations which would otherwise just die out because of the counter action in the physical shock.
Therefore, it is an object of the invention to create a high precision speed control loop.
It is further an object of this invention to increase the bandwidth of a frequency lock loop.
It is further an object of the invention to have the response of a FLL be programmable so that the response can be optimized for a given application.
It is further an object of the invention to have a FLL which is programmable at each electrical cycle or phase.
These objects and others will become apparent to those skilled in the art having access to the following specification and drawings.